Friday, June 15, 2012

Code generation


Code generation converts the intermediate code into the target code consisting
of sequenced machine code or assembly codec that performs the same task. The above
optimized code can be written using registers R1 and R2 which is given below
                        MOVF id3, R2
                        MULF 60.0, R2
                        MOVF id2, R1
                        ADDF R2, R1
                        MOVF R1, id1            
First and second operands of each instruction specify source and destination respectively.
The F in each instruction tells that instruction delays with floating point number.

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